The picture above shows the first of my own designed ATMEL ARM based microcontrollers. The board measure 100 x 68mm and contains an AT91M40800 ARM processor with a 256Kx16 static RAM and 1Mx16 Flash. The original design called for a 1Mx16 SRAM part but HITACHI never got round to making them only producing datasheets, this accounts for the wire straps on the above prototype. The connectors give access to the processor bus and the I/O pins of the processor whilst the white molex connector at the far end of the board is a JTAG port that connects via a wiggler JTAG adapter to GNU Insight.
I have currently got a program that allows the flash to be programmed from the internal SRAM within the ARM thus allowing a bootstrap program to be loaded into the FLASH that gives access to the external SRAM. For code development the JTAG port is used to load code into the SRAM and then the code is executed from there.
The schematics for this board along with the board layout files are be available from the downloads page in Eagle 4.0 format.. The boards have been laid out using EAGLE, and the board is small enough to run under the free version of the software. I also have in development a network card that will piggyback this board and provide a twisted pair ethernet interface.
The on-board FLASH can be programmed using a utility available on the downloads page. The documentation for the flash programmer is available here, as well as within the zip file itself. The documentation also contains a description of the ATMEL ARM memory mapping at reset, to explain why there are actually two FLASH programmers.
The card above shows the first prototype network interface card. It contains a Crystal CS8900A and a single channel serial port. The CS8900A also supports a config EEPROM that holds the MAC address and other CS8900 required setup data. The address for the CS8900A can be selected from a set of 16 addresses using the on-board jumpers, this will allow up to 16 I/O devices to be connected to a CPU card and will enable the user to have upto 16 of these network cards in use at the same time.
Currently there are test facilities to prove the functioning of the card and it will respond to network pings. The source code for this program can be found on the downloads page. Note that it is currently tested by loading the program into the SRAM of the CPU board using GDB and RedBoot running on the CPU card. The on-board serial port is supported by RedBoot but the handshaking lines are not currently supported by the RedBoot serial driver.
The schematics for this board will be available from the downloads page shortly, once they have been checked and released.
Please contact me if you want further details (e-mail - Andy Hare @ ap-systems.co.uk).